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Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro, Eduard Ayguade. UPC-DAC-RR-CAP-2010-17 (Grup de Computació d'Altes Prestacions) Short-Interval Voltage and Frequency Scaling: Characterization and Optimization Opportunities . Research Report Departament d'Arquitectura de Computadors (DAC) - UPC, June 2010.


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This paper studies the effect of a short-interval DVFS system in a multi-core architecture on a representative workload. We have configured an Intel R CoreTM 2 processor to operate using 11 different DVFS P-states that cover a range of frequencies from 2.5GHz to 0.8GHz. We have run the SPECcpu2006 benchmark suite and studied the response of every application in front of smooth changes of frequency. The study characterizes every application in terms of the performance, power and energy levels observed. With the output of this study, we explore the space that a short-interval DVFS system offers to design OS policies. We quantify the power and energy savings that can be obtained assuming certain grade of performance degradation in direct relation to the decrements produced in the operating frequency. We have observed that smooth changes in frequency within the lower range of available frequencies have the same effects no matter the characteristics of the target application. On the other side, when the smooth changes occur in the higher levels of the available frequencies, then the memory access ratio exposed by the applications do matter, and the response of the target application is different in terms of performance, power and EDP but equally in terms of energy. The results show that for the studied architecture, it is possible to define OS power policies that reach power savings of 30% while keeping the performance degradation always under a 17% of slowdown. For energy, it is possible to implement OS energy policies that save a 20% of energy, but with a slowdown about 19%. The basis for this level of optimization is a short-interval DVFS system capable of featuring smooth changes in frequency within a wide range of P-states

BibTex Reference

   Author = {Bertran, Ramon and Gonzalez, Marc and Martorell, Xavier and Navarro, Nacho and Ayguade, Eduard},
   Title = {{UPC-DAC-RR-CAP-2010-17 (Grup de Computació d'Altes Prestacions) Short-Interval Voltage and Frequency Scaling: Characterization and Optimization Opportunities }},
   Institution = {Departament d'Arquitectura de Computadors (DAC) - UPC},
   Month = {June},
   Year = {2010}

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