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Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro, Eduard Ayguade. Local Memory Design Space Exploration for High-Performance Computing. The Computer Journal (Impact Factor: 1.000), 54(5):786-799, 2011.


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The performance of high-performance computing (HPC) applications highly depends on the memory subsystem due to the huge data sets used that do not fit into the cache hierarchy. Besides, energy efficiency has become a main design factor and, consequently, both performance and energy efficiency are primary goals in HPC designs. As a result, energy-efficient high-performance memory subsystem designs should be explored. In this paper, we extend the architecture of general-purpose processors by adding a software-managed local memory (LM) and a very simple programmable DMA controller. We demonstrate that with these extensions-together with efficient run-time management-we improve performance and energy consumption factors. We perform an LM design space exploration study for an Intel(R) Pentium(R) 4 platform: we analyze the performance, energy and energy-delay product for a total of 27 computational loops of the NAS benchmarks. We show a 1.2x performance speedup factor and an energy reduction of 6.21% on average when using a constrained 32 KB LM with commodity memory bandwidths (6.4 GB/s). More aggressive configurations (i.e. 256 KB LM + 12.8 GB/s) show at least 2.14x performance speedup factors and energy savings of 42.07% on average

BibTex Reference

   Author = {Bertran, Ramon and Gonzalez, Marc and Martorell, Xavier and Navarro, Nacho and Ayguade, Eduard},
   Title = {{Local Memory Design Space Exploration for High-Performance Computing}},
   Journal = {The Computer Journal (Impact Factor: 1.000)},
   Volume = {54},
   Number = {5},
   Pages = {786--799},
   Publisher = {Oxford University Press},
   Year = {2011}

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